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Tag Archives: code provided
Convolutional Coding
Convolutional Coding is a form of error correction code that is fairly popular because of the fairly low decoding complexity, and because there are popular algorithms that accept soft inputs. The encoding complexity for convolutional codes is extremely low as … Continue reading
Stylizer Script
One of the large issues with code generation is getting unreadable results. Very long lines are easily generated because it’s easy to describe bit-by-bit operations algorithmically. This is very true of LDPC and other ECC codes. I decided to make … Continue reading
Verilog Code Generator
In a previous article, I released a VHDL code generator written in python and using python as the embedded language. That generator worked fairly cleanly, adding constructs that mostly looked like VHDL code. I decided to try a different approach … Continue reading
Better Pipelined Accumulator
As mentioned in a previous article, there is a better was to perform a pipelined addition or accumulation. This method works on the ability of an addition to be efficiently broken up across multiple cycles.
Adding Python to VHDL
From previous articles, it might be obvious that I’m a fan of code-generation over the language features in VHDL. This is mainly because the vendors are always slow to adopt any existing parts of the VHDL standard. Further, portability is … Continue reading
Updated Reed-Solomon Encoder
When I originally wrote my Reed-Solomon encoder, I used the basic polynomial long division method directly. This made a lot of sense at the time. It turns out that there is actually a slightly better method.
Posted in FPGA, Math
Tagged code provided, reed solomon
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Xilinx’s ISIM and TCL
In Xilinx’s ISE 11, isim is another of the tools that was made by people who didn’t intend on using them. At least, not in the way they would be advertised to the end user. Really, the disconnect between the … Continue reading
Posted in Fundamentals
Tagged code provided, reed solomon, simulation
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Reed Solomon Decoder, Overview
Recently, I had written a Reed-Solomon encoder module out of curiosity. The next step was to write the decoder. The resulting decoder was written to work with my encoder — allowing a valid input every cycle. The project was very … Continue reading
Another Galois Field Multiply
After completing my Reed-Solomon decoder’s HDL, I decided to see how well it performed. The results weren’t as good as I expected. The limiting path was in the field math. A bit of simple pipelining allowed 250MHz operation on my … Continue reading
Posted in FPGA, Math
Tagged code provided, galois field
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Reed-Solomon Encoder
This article describes how to make a performance optimized Reed-Solomon encoder. The actual encoder is for an full-length, narrow-sense RS code. In this case, the code generated was an code that could allow at least 8 bytes to be corrected, … Continue reading