Welcome
Welcome to cdstahl.orgCategories
-
Recent Posts
- VHDL Procedures
- Exporting Hierarchy from Vivado
- VHDL and Division vs Shifting
- Inferring Multiple BRAMs
- SSH Host-Key Setup
- Numeric_Std vs Std_Logic_Unsigned
- Creative Uses of Addition
- Sandbox, Bit Counting
- Using GIT to Manage Builds
- Mixing LFSRs
- Affine Feedback Shift Register
- Verilog’s Casex Issue
- Linear Regression
- Non-Orthogonal Basis Vectors
- Viterbi Decoder, Traceback
Archives
Meta
Monthly Archives: August 2010
Inferring DSP48 slices in Verilog
The full DSP48E1 component has so many ports that Xilinx has started making “macro” primitives for common DSP48 uses. The DSP48E1 in the Virtex-6 has a lot of advanced features. XST supports inferring multipliers, and there are even some code … Continue reading
Xilinx’s ISIM and TCL
In Xilinx’s ISE 11, isim is another of the tools that was made by people who didn’t intend on using them. At least, not in the way they would be advertised to the end user. Really, the disconnect between the … Continue reading
Posted in Fundamentals
Tagged code provided, reed solomon, simulation
Comments Off on Xilinx’s ISIM and TCL
Evaluating Polynomials in an FPGA
Sometimes, a polynomial will need to be evaluated at a specific value in an algorithm. This might be used for curve fitting or interpolation. Another case is for Galois Fields and error correction, where high-degree polynomials are common. There is … Continue reading
Reed Solomon Decoder, Forney’s Equation
In the previous articles, I described how to find the syndromes, the error locater polynomial, and the roots of that polynomial. The last bit of information needed is the error magnitudes. Forney’s equation can be used to determine this.
Reed Solomon Decoder, Chein Search
The Berlekamp-Massey algorithm provides an error locater polynomial. Similar to the syndromes, this polynomial doesn’t provide the required information directly. Instead, it is the multiplicative inverse of the roots of this polynomial that correspond to the error locations. Just like … Continue reading
Reed Solomon Decoder, Berlekamp-Massey
Given a sequence of syndromes, the Berlekamp-Massey algorithm determines an LFSR that could generate this sequence. This helps explain how the syndromes can both find and correct errors. The locations of errors are based on the pattern behind the syndromes. … Continue reading
Reed Solomon Decoder, Syndromes
As mentioned, the first part of my Reed-Solomon decoder implementation is the calculation of syndromes. This is a straightforward process that only requires a large amount of parallel processing.
Reed Solomon Decoder, Overview
Recently, I had written a Reed-Solomon encoder module out of curiosity. The next step was to write the decoder. The resulting decoder was written to work with my encoder — allowing a valid input every cycle. The project was very … Continue reading
Another Galois Field Multiply
After completing my Reed-Solomon decoder’s HDL, I decided to see how well it performed. The results weren’t as good as I expected. The limiting path was in the field math. A bit of simple pipelining allowed 250MHz operation on my … Continue reading
Posted in FPGA, Math
Tagged code provided, galois field
Comments Off on Another Galois Field Multiply
Division by Multiplication
Occasionally, a value will need to be divided by a non-power of two. Using the division cores from coregen is an option. Certainly it is a good option if area isn’t a concern but a quick design time is. Another … Continue reading
Posted in FPGA
Comments Off on Division by Multiplication